Wipro’s VLSI service providing end-to-end SoC/ASIC design includes:
- Development of Derivative / New SoCs in wide range of process nodes all the way down to 10nm.
- Development of Test chip hence enabling customer design for newer process nodes
- RTL development, ASIC/SOC Verification
- Design for Test and supporting Industrialization requirements.
- FPGA based solutions and Emulation requirements
- Physical Design
- Analog Mixed Signal Design, AMS verification and Layout
- Silicon Validation including productization services
Our VLSI team leverages partnerships with leading IP providers, EDA vendors and fab houses, an in-house framework called EagleWision that supports industry standard tools from Synopsys, Cadence and Mentor (or tool flow combinations to provide flexibility for ‘first time right’ design) and a SerDes Center of Excellence with multiple SerDes designs including 28G SerDes development in TSMC16ff+ and 16ffC process to its credit. Our service has more than 150 tape outs to its credit in the last 5 years. Clients who engage us accelerate the development of next generation products.