IC Package Design & Characterization
As part of Wipro’s Silicon Turnkey Services, we offer IC Package Design & Characterization services. This service includes different package design activities like Substrate Design, Electrical Analysis/ Characterization, Thermal Analysis/ Characterization, etc.
We have the capability to do package designs ranging from SOPs to multilayer substrate BGAs. Our package design flow has a well-defined design structure from identifying the package to substrate design and output generation. We can perform Electrical and Thermal package characterization of the package, if our customers want to have a better idea of the electrical/thermal performance of their packaged chip well before fabrication.
Wipro Package Design Flow

Our detailed IC Package Design & Characterization capabilities are:
Package Design
- Identify Package (SOP - BGA)
- Pin Mapping
- Die to Package Bonding (Wire Bond, Flip Chip, etc.)
- Leadframe/Substrate Connectivity (Stack-up, Power Planes, Routing, etc.)
- Design Verification
- Design Documentation
- Output Generation (Gerber, ODB++, GDSII, DXF, etc.)
Electrical Analysis/ Characterization
- RLC 3-D Extraction
- Substrate Impedance Analysis
- Propagation Delay Report for Netlist
- Pre/Post Route SPICE/IBIS 3-D Model Simulations on Nets
- Cross talk, Reflection, Over/Under Shoot Analysis
- Timing Analysis
- Power/Ground Bounce/SSN Analysis
- 3D-Package Modeling and IBIS Model Generation
Thermal Analysis/Characterization
- Thermal Modeling based on JEDEC Test Setup
- Thermal Resistance (Rjb, Rjc, Rja)
- Package Thermal Characterization
- Junction Temperature Reliability
- Junction Temperature Functionality
- Case Temperature
- Board Temperature, etc.
We are using the following as primary tools in our design flow.
- Allegro Package Designer (Substrate Design)
- Allegro Package SI (Electrical Analysis)
- Flotherm/ Flopack (Thermal Analysis)
The tool selection can be customized depending on client requirements.
Wipro- IC Package Design- Highlights
- Packaging capability from SOP to BGA and design capability in MCM, SiP etc.
- Capability in bonding diagram preparation/substrate design
- Design rule access to major package vendors
- Concurrent package design; along with IC physical design
- Ability to interface independently with package vendor during design and production
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